奈米工程與微系統研究所　書報討論

Seminar of Inst. NanoEngineering and MicroSystems

李昌駿副教授

Lee, Chang- Chun

Department of Power Mechanical Engineering

National Tsing Hua University

The Estimated Importance of Virtual Prototyping Simulation for Advanced Package

Abstract:

As the technology of the semiconductor process continues its scale miniaturization and improvement of electronic device performances, next-generation IC chips with Cu/low-k stacked structures and adopting the fabrication of a damascene module are being developed to meet the urgent requirements of reducing high RC delay so as to obtain high-speed signal communication. However, due to the thermal stress resulted from the CTE mismatch as well as a mismatch of elastic modulus existing in dissimilar materials, there is a high probability that doing so may contribute to interfacial cracks occurring or propagating within the multi-level interconnection system, composed of the copper interconnections and low-k dielectric materials, as a result of poor adhesion and intrinsically lower fracture toughness of the low-k materials when temperature loads are applied during the wafer level and the packaging level stages. Therefore, this fracturing problem has become one of the critical issues for thermo-mechanical device reliability, which needs to be resolved urgently. Accordingly, a reliable crack prediction methodology based on finite element calculation is developed to investigate the stress-induced impacts on the thermo-mechanical reliability of electronic interconnects during the whole cracking growth process of the bi-material interface. In this research, detailed interpretations for the opportunity of interfacial delamination and the determination of crack advance estimated by J-integral method and modified VCCT in FEA are systematically presented. Moreover, by means of a four-point bending test FEA model and a comparison with the relative experimental data of multi low-k dielectric films, the methodology of finding a stable cracking energy for dissimilar materials has been validated to be reliable. Based on the above, the development of design/prediction methodologies for the cracking/delamination issues regarding the thermo-mechanical reliability of advanced electronic devices presented in this investigation can be demonstrated and widely applied in various electronic device structures.

15:30-17:00 on Oct. 2 (Mon), 2017 at Room 108 of Eng. Building I

Host：Prof. Chao-An Lin calin@pme.nthu.edu.tw Ext:42607

Contact：Praveen praveenbowler@gmail.com  Mobile: 0909537757